ECTS - Advanced Digital Design with HDL
Advanced Digital Design with HDL (EE425) Course Detail
Course Name | Course Code | Season | Lecture Hours | Application Hours | Lab Hours | Credit | ECTS |
---|---|---|---|---|---|---|---|
Advanced Digital Design with HDL | EE425 | Area Elective | 2 | 2 | 0 | 3 | 5 |
Pre-requisite Course(s) |
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EE203 |
Course Language | English |
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Course Type | Elective Courses |
Course Level | Natural & Applied Sciences Master's Degree |
Mode of Delivery | Face To Face |
Learning and Teaching Strategies | Lecture, Demonstration. |
Course Lecturer(s) |
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Course Objectives | Sayısal devrelerin bir donanım tanımlama dili kullanarak nasıl tasarlanıp temsil edilebileceğini ve bir programlanabilir cihaz ile nasıl gerçekleştirilebileceğini öğretmek |
Course Learning Outcomes |
The students who succeeded in this course;
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Course Content | Behavioural, dataflow and structural modelling of digital circuits with Verilog HDL. Language constructs of Verilog. Design of finite state machines with data path using Verilog. Introduction to modern CAD tools. Simulation and verification of digital circuits. |
Weekly Subjects and Releated Preparation Studies
Week | Subjects | Preparation |
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1 | Introduction to HDLs, Verilog overview: Structural and dataflow representation of combinational circuits with Verilog | Review lecture notes. |
2 | Verilog overview: Behavioral representation of combinational circuits, testbenches, simulation of combinational circuits | Review lecture notes. |
3 | Verilog operators, datatypes | Review lecture notes. |
4 | Representation of number in verilog, bit length adjustment | Review lecture notes. |
5 | Always block, coding guidelines, coding examples | Review lecture notes. |
6 | Coding examples | Review lecture notes. |
7 | Review of finite state machines, design examples | Review lecture notes. |
8 | Timing diagram of finite state machines, ASM chart | Review lecture notes. |
9 | Representation of finite state machines with Verilog | Review lecture notes. |
10 | Finite state machine coding examples | Review lecture notes. |
11 | Finite state machine coding examples | Review lecture notes. |
12 | Verilog representation of regular sequential circuits: Registers, shift registers, counters etc. | Review lecture notes. |
13 | Finite state machine with data path, Verilog representation | Review lecture notes. |
14 | Finite state machine with data path design examples | Review lecture notes. |
15 | Final Examination | Review course material |
16 | Final Examination | Review course material |
Sources
Other Sources | 1. FPGA Prototyping Using Verilog Examples, Chu |
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Evaluation System
Requirements | Number | Percentage of Grade |
---|---|---|
Attendance/Participation | - | - |
Laboratory | 1 | 30 |
Application | - | - |
Field Work | - | - |
Special Course Internship | - | - |
Quizzes/Studio Critics | - | - |
Homework Assignments | - | - |
Presentation | - | - |
Project | - | - |
Report | - | - |
Seminar | - | - |
Midterms Exams/Midterms Jury | 2 | 40 |
Final Exam/Final Jury | 1 | 30 |
Toplam | 4 | 100 |
Percentage of Semester Work | 70 |
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Percentage of Final Work | 30 |
Total | 100 |
Course Category
Core Courses | X |
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Major Area Courses | |
Supportive Courses | |
Media and Managment Skills Courses | |
Transferable Skill Courses |
The Relation Between Course Learning Competencies and Program Qualifications
# | Program Qualifications / Competencies | Level of Contribution | ||||
---|---|---|---|---|---|---|
1 | 2 | 3 | 4 | 5 | ||
1 | An ability to apply advanced knowledge of computing and/or informatics to solve software engineering problems. | |||||
2 | Develop solutions using different technologies, software architectures and life-cycle approaches. | |||||
3 | An ability to design, implement and evaluate a software system, component, process or program by using modern techniques and engineering tools required for software engineering practices. | |||||
4 | An ability to gather/acquire, analyze, interpret data and make decisions to understand software requirements. | |||||
5 | Skills of effective oral and written communication and critical thinking about a wide range of issues arising in the context of working constructively on software projects. | |||||
6 | An ability to access information in order to follow recent developments in science and technology and to perform scientific research or implement a project in the software engineering domain. | |||||
7 | An understanding of professional, legal, ethical and social issues and responsibilities related to Software Engineering. | |||||
8 | Skills in project and risk management, awareness about importance of entrepreneurship, innovation and long-term development, and recognition of international standards of excellence for software engineering practices standards and methodologies. | |||||
9 | An understanding about the impact of Software Engineering solutions in a global, environmental, societal and legal context while making decisions. | |||||
10 | Promote the development, adoption and sustained use of standards of excellence for software engineering practices. |
ECTS/Workload Table
Activities | Number | Duration (Hours) | Total Workload |
---|---|---|---|
Course Hours (Including Exam Week: 16 x Total Hours) | 16 | 2 | 32 |
Laboratory | 7 | 2 | 14 |
Application | |||
Special Course Internship | |||
Field Work | |||
Study Hours Out of Class | 14 | 4 | 56 |
Presentation/Seminar Prepration | |||
Project | |||
Report | |||
Homework Assignments | |||
Quizzes/Studio Critics | |||
Prepration of Midterm Exams/Midterm Jury | 2 | 6 | 12 |
Prepration of Final Exams/Final Jury | 1 | 10 | 10 |
Total Workload | 124 |