ECTS - Embedded System Design with Field Programmable Gate Arrays

Embedded System Design with Field Programmable Gate Arrays (EE525) Course Detail

Course Name	Course Code	Season	Lecture Hours	Application Hours	Lab Hours	Credit	ECTS
Embedded System Design with Field Programmable Gate Arrays	EE525	Area Elective	3	0	0	3	5

Pre-requisite Course(s)
N/A

Course Language	English
Course Type	Elective Courses
Course Level	Ph.D.
Mode of Delivery	Face To Face
Learning and Teaching Strategies	Lecture, Demonstration, Discussion, Question and Answer, Drill and Practice.
Course Coordinator
Course Lecturer(s)	Asst. Prof. Dr. Mehmet Efe Özbek
Course Assistants
Course Objectives	1. To strengten the skills for finite state machine design 2. Teach how to describe finite state machines with a hardware description language 3. Teach how to describe regular sequential circuits such as counters, shift registers with a hardware description language 4. Teach how to design finite state machines with datapath 5. Teach how to describe design finite state machines with datapath with a hardware description language 6. Teach how to design and code testbenches 7. Introduce simulation tools used for digital circuit simulation 8. Make aware of the issues in comtemporary digital design
Course Learning Outcomes	The students who succeeded in this course; Abel to describe the impact of advanced digital systems in modern life. Abel to design finite state machine from given logical specifications. Abel to write Verilog code describing a synchronous sequential circuits using behavioral design elements. Abel to design finite state machines with datapath in RTL level from given logical specifications. Abel to write Verilog code describing finite state machines with datapath Abel to design and write code for testing sequential circuits. Abel to verify sequential circuits using simulation tools. Abel to synthesize the designs on an FPGA and verify its operation. Abel to design and implement an embedded system using an FPGA prototyping board and associated design tools.
Course Content	Language constructs of Verilog, behavioral models of combinational and sequential logic; logic, RTL, and high-level synthesis of combinational and sequential logic; datapath controllers; programmable logic and storage devices, HDL architectures for basic digital processing implementations.

Weekly Subjects and Releated Preparation Studies

Week	Subjects	Preparation
1	Historical perspective, Digital products and their impact in modern life	Please, review the lecture notes and glance this week’s topics from your text book.
2	Moore type finite state machine design	Please, review the lecture notes and glance this week’s topics from your text book.
3	Mealy type finite state machine design.	Please, review the lecture notes and glance this week’s topics from your text book.
4	Timing of sequential circuits	Please, review the lecture notes and glance this week’s topics from your text book.
5	Verilog components for description of sequential circuits	Please, review the lecture notes and glance this week’s topics from your text book.
6	Description of finite state machines with Verilog	Please, review the lecture notes and glance this week’s topics from your text book.
7	Description of finite state machines with Verilog	Please, review the lecture notes and glance this week’s topics from your text book.
8	Finite state machines with data path and their description using Verilog	Please, review the lecture notes and glance this week’s topics from your text book.
9	Finite state machines with data path and their description using Verilog	Please, review the lecture notes and glance this week’s topics from your text book.
10	Finite state machines with data path and their description using Verilog	Please, review the lecture notes and glance this week’s topics from your text book.
11	Using I/O Modules of Xilinx Spartan Starter Kit	Please, review the lecture notes and glance this week’s topics from your text book.
12	Using I/O Modules of Xilinx Spartan Starter Kit	Please, review the lecture notes and glance this week’s topics from your text book.
13	Using I/O Modules of Xilinx Spartan Starter Kit	Please, review the lecture notes and glance this week’s topics from your text book.
14	Contemporary issues in digital design	Please, review the lecture notes and glance this week’s topics from your text book.
15	Final examination period	Review of topics
16	Final examination period	Review of topics

Sources

Course Book	1. Pong P. Chu, FPGA Prototyping Using Verilog Examples, Wiley-Interscience, 1st Edition, 2008.

Evaluation System

Requirements	Number	Percentage of Grade
Attendance/Participation	-	-
Laboratory	-	-
Application	-	-
Field Work	-	-
Special Course Internship	-	-
Quizzes/Studio Critics	-	-
Homework Assignments	-	-
Presentation	-	-
Project	5	40
Report	-	-
Seminar	-	-
Midterms Exams/Midterms Jury	2	30
Final Exam/Final Jury	1	30
Toplam	8	100

Percentage of Semester Work	70
Percentage of Final Work	30
Total	100

Course Category

Core Courses	X
Major Area Courses
Supportive Courses
Media and Managment Skills Courses
Transferable Skill Courses

The Relation Between Course Learning Competencies and Program Qualifications

#	Program Qualifications / Competencies	Level of Contribution
#	Program Qualifications / Competencies	1	2	3	4	5
1	Ability to carry out advanced research activities, both individual and as a member of a team
2	Ability to evaluate research topics and comment with scientific reasoning
3	Ability to initiate and create new methodologies, implement them on novel research areas and topics
4	Ability to produce experimental and/or analytical data in systematic manner, discuss and evaluate data to lead scintific conclusions
5	Ability to apply scientific philosophy on analysis, modelling and design of engineering systems
6	Ability to synthesis available knowledge on his/her domain to initiate, to carry, complete and present novel research at international level
7	Contribute scientific and technological advancements on engineering domain of his/her interest area
8	Contribute industrial and scientific advancements to improve the society through research activities

ECTS/Workload Table

Activities	Number	Duration (Hours)	Total Workload
Course Hours (Including Exam Week: 16 x Total Hours)	16	3	48
Laboratory
Application
Special Course Internship
Field Work
Study Hours Out of Class	14	4	56
Presentation/Seminar Prepration
Project
Report
Homework Assignments
Quizzes/Studio Critics
Prepration of Midterm Exams/Midterm Jury	3	3	9
Prepration of Final Exams/Final Jury	1	5	5
Total Workload			118