Advanced Digital Design with HDL (EE425) Course Detail

Course Name	Course Code	Season	Lecture Hours	Application Hours	Lab Hours	Credit	ECTS
Advanced Digital Design with HDL	EE425	Area Elective	2	2	0	3	5

Pre-requisite Course(s)
EE203

Course Language	English
Course Type	Elective Courses
Course Level	Natural & Applied Sciences Master's Degree
Mode of Delivery	Face To Face
Learning and Teaching Strategies	Lecture, Demonstration.
Course Coordinator
Course Lecturer(s)	Asst. Prof. Dr. Mehmet Efe Özbek
Course Assistants
Course Objectives	Sayısal devrelerin bir donanım tanımlama dili kullanarak nasıl tasarlanıp temsil edilebileceğini ve bir programlanabilir cihaz ile nasıl gerçekleştirilebileceğini öğretmek
Course Learning Outcomes	The students who succeeded in this course; Write Verilog code describing a synchronous sequential circuits using behavioral design elements. Design finite state machines with datapath in RTL level from given logical specifications. Write Verilog code describing finite state machines with datapath. Design and write code for testing sequential circuits. Verify the operation of sequential circuits using simulation tools Synthesize the designs on an FPGA and verify its operation
Course Content	Behavioural, dataflow and structural modelling of digital circuits with Verilog HDL. Language constructs of Verilog. Design of finite state machines with data path using Verilog. Introduction to modern CAD tools. Simulation and verification of digital circuits.

Weekly Subjects and Releated Preparation Studies

Week	Subjects	Preparation
1	Introduction to HDLs, Verilog overview: Structural and dataflow representation of combinational circuits with Verilog	Review lecture notes.
2	Verilog overview: Behavioral representation of combinational circuits, testbenches, simulation of combinational circuits	Review lecture notes.
3	Verilog operators, datatypes	Review lecture notes.
4	Representation of number in verilog, bit length adjustment	Review lecture notes.
5	Always block, coding guidelines, coding examples	Review lecture notes.
6	Coding examples	Review lecture notes.
7	Review of finite state machines, design examples	Review lecture notes.
8	Timing diagram of finite state machines, ASM chart	Review lecture notes.
9	Representation of finite state machines with Verilog	Review lecture notes.
10	Finite state machine coding examples	Review lecture notes.
11	Finite state machine coding examples	Review lecture notes.
12	Verilog representation of regular sequential circuits: Registers, shift registers, counters etc.	Review lecture notes.
13	Finite state machine with data path, Verilog representation	Review lecture notes.
14	Finite state machine with data path design examples	Review lecture notes.
15	Final Examination	Review course material
16	Final Examination	Review course material

Sources

Other Sources	1. FPGA Prototyping Using Verilog Examples, Chu

Evaluation System

Requirements	Number	Percentage of Grade
Attendance/Participation	-	-
Laboratory	1	30
Application	-	-
Field Work	-	-
Special Course Internship	-	-
Quizzes/Studio Critics	-	-
Homework Assignments	-	-
Presentation	-	-
Project	-	-
Report	-	-
Seminar	-	-
Midterms Exams/Midterms Jury	2	40
Final Exam/Final Jury	1	30
Toplam	4	100

Percentage of Semester Work	70
Percentage of Final Work	30
Total	100

Course Category

Core Courses	X
Major Area Courses
Supportive Courses
Media and Managment Skills Courses
Transferable Skill Courses

The Relation Between Course Learning Competencies and Program Qualifications

#	Program Qualifications / Competencies	Level of Contribution
#	Program Qualifications / Competencies	1	2	3	4	5
1	An ability to apply knowledge of mathematics, science, and engineering.					X
2	An ability to design and conduct experiments, as well as to analyse and interpret data.			X
3	An ability to design a system, component, or process to meet desired needs.					X
4	An ability to function on multi-disciplinary domains.
5	An ability to identify, formulate, and solve engineering problems.				X
6	An understanding of professional and ethical responsibility.
7	An ability to communicate effectively.
8	Recognition of the need for, and an ability to engage in life-long learning.			X
9	A knowledge of contemporary issues.			X
10	An ability to use the techniques, skills, and modern engineering tools necessary for engineering practice.					X
11	Skills in project management and recognition of international standards and methodologies
12	An ability to produce engineering products or prototypes that solve real-life problems.				X
13	Skills that contribute to professional knowledge.			X
14	An ability to make methodological scientific research.			X
15	An ability to produce, report and present an original or known scientific body of knowledge.			X
16	An ability to defend an originally produced idea.

ECTS/Workload Table

Activities	Number	Duration (Hours)	Total Workload
Course Hours (Including Exam Week: 16 x Total Hours)	16	2	32
Laboratory	7	2	14
Application
Special Course Internship
Field Work
Study Hours Out of Class	14	4	56
Presentation/Seminar Prepration
Project
Report
Homework Assignments
Quizzes/Studio Critics
Prepration of Midterm Exams/Midterm Jury	2	6	12
Prepration of Final Exams/Final Jury	1	10	10
Total Workload			124